iron core) induct...Figure P6.2.1 Network with two coupled linear (without any iron core) induct...Figure P6.3.1 Network with two coupled linear (without any iron core) induct...Figure P6.4.1 Network with two coupled linear (without any iron core) induct...Figure P6.5.1 Network with two coupled linear (without any iron core) induct...Figure P6.6.1 Network with two coupled linear (without any iron core) induct...Figure P6.7.1 Network with ideal (step‐up) transformer with N1 : N2 winding ...Figure P6.8.1 Network with ideal (step‐up) transformer with N1 : N2 winding ...Figure P6.9.1 Network with ideal (step‐down) transformer with N1 : N2 windin...Figure P6.10.1 Network with ideal (step‐down) transformer with N1 : N2 windi...Figure P6.11.1 Network with ideal (step‐down) transformer with N1 : N2 windi...Figure P6.12.1 Circuit with Y‐Δ three‐phase distribution transformer with tw...Figure P6.13.1 Circuit with Y‐Δ three‐phase distribution transformer with Δ‐...Figure P6.14.1 Circuit with Δ–Δ three‐phase, sub‐transmission transformer wi...Figure P6.15.1 Circuit with Δ–Δ three‐phase sub‐transmission transformer wit...Figure P6.16.1 Circuit with Δ–Δ three‐phase transmission transformer with tw...
8 Chapter 7Figure 7.1 Definition of general transfer function G(jω) = M(ω)ejϕ...Figure E7.1.1 First‐order RC low‐pass filter circuit.Figure E7.1.2 Magnitude M(ω) and the phase angle Φ(ω) for first‐or...Figure E7.2.1 First‐order RC high‐pass filter circuit.Figure E7.2.2 Magnitude M(ω) and the phase angle Φ(ω) for first‐or...Figure E7.3.1 Band‐pass (second‐order) RLC filter circuit.Figure E7.3.2 Magnitude M(ω) and phase angle Φ(ω) for (second‐orde...Figure E7.4.1 Band‐rejection (second‐order) RLC filter circuit.Figure E7.4.2 Magnitude M(ω) and phase angle Φ(ω) for (second‐orde...Figure E7.5.1 Series RLC (second‐order) resonant circuit.Figure E7.5.2 Magnitude
and phase angle ΦIs(ω) of the source current Figure E7.5.3 Phasors
and
. For 7.5 krad/s < ω0 the current
leads Figure E7.6.1 Parallel GLC (second‐order) resonant circuit, where G = 1/R.Figure E7.6.2 Magnitude
and phase angle ΦIs(ω) of the source current Figure E7.6.3 Phasors
and
. For 5 krad/s < ω0 the current
lags
, ...Figure E7.7.1 RLC series network.Figure P7.1.1 Network R1, R2, and C.Figure P7.2.1 Network R, L, and C.Figure P7.3.1 Network R1, R2, L, and C.Figure P7.4.1 RC network.Figure P7.5.1 Network R1, R2, and C.Figure P7.6.1 Series network R, L, and C.Figure P7.7.1 Series network R, L, and C with vs(t) = 169.68 V cos ωt o...Figure P7.11.1 Parallel network.Figure P7.12.1 Parallel network R, L, and C.Figure P7.13.1 Network R1, R2, L, and C.
9 Chapter 8Figure 8.1 Linear ideal operational amplifier with input (vin1,vin2) and o...Figure 8.2 Linear ideal operational amplifier with input voltages vin2,vin...Figure 8.3 Power supply voltages VDD and VSS of linear, ideal operational ...Figure 8.4 Noninverting OP amplifier with resistor R2 as negative feedback ...Figure E8.1.1 (a) Input and (b) output voltage of noninverting linear OP amp...Figure 8.5 Unity‐gain OP amplifier with zero (short‐circuited) negative feed...Figure E8.2.1 Unity‐gain (UG) linear OP amplifier with power supply voltages...Figure 8.6 Inverting OP linear amplifier with resistor R2 as negative feedb...Figure E8.3.1 Inverting linear OP amplifier with power supply voltages of V Figure 8.7 Linear ideal differential amplifier with input voltages vin1 and...Figure 8.8 Summing network with two inputs.Figure 8.9 Integrating circuit.Figure 8.10 Differentiating circuit.Figure E8.6.1 (a) Definition of input step voltage vin(t) via the functions...Figure E8.7.1 (a) Definition of input voltage vin(t) via linear functions f...Figure 8.11 Low‐pass (LP) active filter.Figure 8.12 Low‐pass (LP) active filter frequency response.Figure 8.13 Frequency‐selective high‐pass (HP) active filter.Figure 8.14 High‐pass (HP) active filter frequency response
(pu).Figure 8.15 Current–voltage converter.Figure 8.16 (a) P‐controller network with closed‐loop voltage gain Gv = vo...Figure E8.9.1 Block diagram of separately excited DC machine drive where the...Figure E8.9.2 Definition of the parameter ioutmax of the current limiter.Figure E8.9.3 DC machine armature Ia (A) with current limiter of Figure E8....Figure E8.9.4 DC machine angular velocity ωm (rad/s) with current limi...Figure E8.9.5 DC machine torque T (Nm) with current limiter of Figure E8.9.2...Figure E8.9.6 DC machine output power P (W) with current limiter of Figure E...Figure E8.9.7 DC machine armature Ianew (A) with current limiter of Figure ...Figure E8.9.8 DC machine angular velocity ωm (rad/s) with current limi...Figure E8.9.9 DC machine torque T (Nm) with current limiter of Figure E8.9.2...Figure E8.9.10 DC machine output power P (W) with current limiter of Figure ...Figure E8.9.11 DC machine armature Ia (A) with current limiter of Figure E8...Figure E8.9.12 DC machine angular velocity ωm (rad/s) with current lim...Figure E8.9.13 DC machine torque T (Nm) with current limiter of Figure E8.9....Figure E8.9.14 DC machine output power P (W) with current limiter of Figure ...Figure E8.9.15 DC machine armature Ianew (A) with current limiter of Figure...Figure E8.9.16 DC machine angular velocity ωm (rad/s) with current lim...Figure E8.9.17 DC machine torque T (Nm) with current limiter of Figure E8.9....Figure E8.9.18 DC machine output power P (W) with current limiter of Figure ...Figure E8.9.19 Steady‐state error εωm =
− ωm)/
= 1/(1 +...Figure 8.17 (a) I‐controller network with time constant T = R1C and closed...Figure 8.18 (a) PI‐controller network with proportional–integral control con...Figure 8.19 (a) D controller. (b) Symbolic representation of D controller of...Figure 8.20 (a) PID controller with P, I, and D circuits connected in parall...Figure E8.10.1 PID control of current through load resistor RL with seven i...Figure E8.10.2 Controlled voltage response vRload = V(17) across RL = Rl...Figure E8.10.3 Controlled voltage vRload = V(17) response through RL = R Figure E8.10.4 Controlled voltage vRload = V(17) response through RL = R Figure E8.10.5 Controlled voltage vRload = V(17) response through RL = R Figure 8.21 (a) PD controller with P and D circuits connected in parallel us...Figure P8.1.1 Noninverting (NI) OP amplifier.Figure P8.2.1 (a–c) Determination of closed‐loop voltage gain
for various ...Figure P8.3.1 Determination of closed‐loop voltage gain
of noninverting (N...Figure P8.4.1 Noninverting (NI) OP amplifier supplying ohmic load RL with A...Figure
