Multi-Processor System-on-Chip 1. Liliana Andrade

Multi-Processor System-on-Chip 1 - Liliana Andrade


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      To my parents, sisters and husband, the loves and pillars of my life.

      Liliana ANDRADE

      I express my profound gratitude to Karine, my parents and all my family, for their help and support throughout all these years.

      Frédéric ROUSSEAU

      SCIENCES

      Electronics Engineering, Field Director – Francis Balestra

      Design Methodologies and Architecture, Subject Head – Ahmed Jerraya

      Multi-Processor System-on-Chip 1

       Architectures

       Coordinated by

      Liliana Andrade

      Frédéric Rousseau

      First published 2020 in Great Britain and the United States by ISTE Ltd and John Wiley & Sons, Inc.

      Apart from any fair dealing for the purposes of research or private study, or criticism or review, as permitted under the Copyright, Designs and Patents Act 1988, this publication may only be reproduced, stored or transmitted, in any form or by any means, with the prior permission in writing of the publishers, or in the case of reprographic reproduction in accordance with the terms and licenses issued by the CLA. Enquiries concerning reproduction outside these terms should be sent to the publishers at the undermentioned address:

      ISTE Ltd

      27-37 St George’s Road

      London SW19 4EU

      UK

       www.iste.co.uk

      John Wiley & Sons, Inc.

      111 River Street

      Hoboken, NJ 07030

      USA

       www.wiley.com

      © ISTE Ltd 2020

      The rights of Liliana Andrade and Frédéric Rousseau to be identified as the authors of this work have been asserted by them in accordance with the Copyright, Designs and Patents Act 1988.

      Library of Congress Control Number: 2020940076

      British Library Cataloguing-in-Publication Data

      A CIP record for this book is available from the British Library

      ISBN 978-1-78945-021-7

      ERC code:

      PE6 Computer Science and Informatics

      


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