Origin of Power Converters. Tsai-Fu Wu
5.36 Processes of grafting N‐converters with a TGS.Figure 5.37 Processes of grafting N‐converters with a ΠGS.
6 Chapter 6Figure 6.1 (a) Illustration of a layer scheme in three steps and (b) concept...Figure 6.2 Derivation of the buck–boost converter with the converter layerin...Figure 6.3 Illustration of Zeta converter synthesis with a buck converter an...Figure 6.4 Universal converter configuration of the buck family.Figure 6.5 Two additional converter topologies derived from the universal fo...Figure 6.6 Illustration of the boost family synthesized with the layer schem...Figure 6.7 Universal form of the boost family.Figure 6.8 Two additional converter topologies derived from the universal fo...Figure 6.9 Zeta converter with a positive unity feedback and the layer schem...Figure 6.10 Sepic converter with a positive unity feedback and the layer sch...Figure 6.11 The converter depicted in Figure 6.9c with a negative unity feed...Figure 6.12 The converter depicted in Figure 6.10c with a negative unity fee...Figure 6.13 Illustration of a boost converter with a positive unity voltage ...Figure 6.14 Illustration of Ćuk converter with a negative unity voltage feed...Figure 6.15 Illustration of a buck–boost converter with a negative unity vol...Figure 6.16 Illustration of the deduction from the Ćuk converter to the buck...Figure 6.17 Illustration of the deduction from the sepic converter to the bu...Figure 6.18 Illustration of the deduction from the Zeta converter to the buc...Figure 6.19 Illustration of the deduction from the sepic converter to the Ze...Figure 6.20 Taking output from the other port of the Zeta converter to illus...
7 Chapter 7Figure 7.1 Code configuration for synthesizing the buck converter.Figure 7.2 Buck converter synthesized with the buck–boost converter and a ne...Figure 7.3 Buck converter synthesized with the Ćuk converter and a negative ...Figure 7.4 Two possible configurations of D/(1 − 2D): (a) feedback configura...Figure 7.5 The two configurations shown in Figure 7.4 combined with a unity‐...Figure 7.6 Illustration of synthesizing voltage‐fed z‐source converter with ...Figure 7.7 Illustration of synthesizing voltage‐fed z‐source converter with ...Figure 7.8 Illustration of synthesizing voltage‐fed z‐source converter with ...Figure 7.9 Code configuration of the current‐fed z‐source converter.Figure 7.10 Illustration of synthesizing the current‐fed z‐source converter ...Figure 7.11 Illustration of synthesizing the current‐fed z‐source converter ...Figure 7.12 Code configuration of the quasi‐z‐source converter.Figure 7.13 Illustration of synthesizing the quasi‐z‐source converter with a...Figure 7.14 Illustration of synthesizing the quasi‐z‐source converter with a...Figure 7.15 Three inverse converters including (a) I‐buck, (b) I‐boost, and ...Figure 7.16 Code configurations of the high step‐down transfer code D/(2 − DFigure 7.17 Illustration of synthesizing the high step‐down converter with a...Figure 7.18 Alternate code configurations of the high step‐down transfer cod...Figure 7.19 Illustration of synthesizing the high step‐down converter with a...Figure 7.20 Other code configurations for achieving the transfer code D/(2 −...Figure 7.21 A code configuration to realize the expression shown in Eq. (7.2...Figure 7.22 Illustration of synthesizing the high step‐down converter with a...Figure 7.23 Illustration of synthesizing the high step‐down converter with a...Figure 7.24 Illustration of a sepic converter as a forward path and an I‐buc...Figure 7.25 Illustration of a Zeta converter as a forward path and an I‐Ćuk ...Figure 7.26 Illustration of synthesizing the high step‐up converter with a b...Figure 7.27 Illustration of synthesizing the high step‐up converter with a Ć...Figure 7.28 Illustration of synthesizing the high step‐up converter with a Z...Figure 7.29 Illustration of synthesizing the high step‐up converter with a b...Figure 7.30 Illustration of synthesizing the high step‐up converter with a s...Figure 7.31 A code configuration of the transfer code D/(1 − 2D).Figure 7.32 Illustration of synthesizing the code configuration shown in Fig...Figure 7.33 Illustration of synthesizing the code configuration shown in Fig...Figure 7.34 Cascade code configuration of transfer code D2/(D2 − 3D + 2).Figure 7.35 Illustration of synthesizing the code configuration shown in Fig...Figure 7.36 Illustration of synthesizing the code configuration shown in Fig...Figure 7.37 Illustration of synthesizing the code configuration shown in Fig...Figure 7.38 Zeta converter topology.Figure 7.39 Illustration of the Zeta converter with a DC voltage offsetting....Figure 7.40 Illustration of the Zeta converter with a DC voltage blocking an...Figure 7.41 Illustration of the Zeta converter with a magnetic coupling.Figure 7.42 Illustration of the Zeta converter with a DC transformer.Figure 7.43 Illustration of the Zeta converter with the layer technique and ...Figure 7.44 Illustration of the Zeta converter with the layer technique and ...Figure 7.45 Illustration of the Zeta converter with the layer technique and ...
8 Chapter 8Figure 8.1 Variations of the original converter: (a) a general type, (b) DC ...Figure 8.2 Syntheses of single‐phase converters: (a) combined two DC sources...Figure 8.3 Syntheses of other single‐phase converters: (a) combined two DC s...Figure 8.4 Syntheses of three‐phase converters: (a) full‐bridge three‐phase ...Figure 8.5 Synthesis of Vienna rectifier: (a) single phase and (b) three pha...Figure 8.6 A bidirectional switch realized with (a) two active switches, (b)...Figure 8.7 Configurations of (a) an MMC, (b) a half‐bridge cell, and (c) a f...Figure 8.8 Configurations of (a) a full‐bridge three‐level FCC for generatin...Figure 8.9 Full‐bridge resonant converters with (a) LC, (b) LCL, and (c) LLC
9 Chapter 9Figure 9.1 Illustration of a zero‐current switching.Figure 9.2 Proper locations of snubber inductor L1 for PWM converters to ach...Figure 9.3 NZCS lossless cells with energy recovery: (a) associated with the...Figure 9.4 Passive soft‐switching buck converter with NZCS, in which the sof...Figure 9.5 Passive soft‐switching boost converter with NZCS, in which the so...Figure 9.6 Illustration of a zero‐voltage switching.Figure 9.7 Proper locations of snubber capacitor C1 for PWM converters to ac...Figure 9.8 Near‐zero‐voltage turn‐off lossless snubbers with energy recovery...Figure 9.9 Passive soft‐switching buck converter with NZCS and NZVS.Figure 9.10 Passive soft‐switching boost converter with NZCS and NZVS.Figure 9.11 Zero‐voltage turn‐on lossless snubbers with energy recovery.Figure 9.12 Active soft‐switching converter with ZVS (type 1).Figure 9.13 Active soft‐switching converter with ZVS (type 2).Figure 9.14 Active soft‐switching converter with ZVS (type 3).Figure 9.15 Zero‐current turn‐off lossless snubber with energy recovery.Figure 9.16 Active soft‐switching converter with ZCS (type1).Figure 9.17 Active soft‐switching converter with ZCS (type2).Figure 9.18 Passive NZVS/NZCS soft‐switching buck and boost PWM converters: ...Figure 9.19 Derivation of the passive soft‐switching PWM buck–boost PWM conv...Figure 9.20 Derivation of the active soft‐switching PWM buck–boost SSC with ...Figure 9.21 Passive soft‐switching PWM DC/DC converters derived from the six...Figure 9.22 Illustration of buck–boost and Zeta passive soft‐switching conve...Figure 9.23 Illustration of Ćuk and sepic passive soft‐switching converters ...Figure 9.24 General configuration of a soft‐switching BCU with a feedback ne...Figure 9.25 Two derived passive soft‐switching converters from the general c...Figure 9.26 A list of active soft‐switching buck family with six basic soft‐...Figure 9.27 A list of active soft‐switching boost family with six basic soft...Figure 9.28 Illustration of the active soft‐switching buck–boost–buck conver...Figure 9.29 Illustration of the active soft‐switching Zeta‐buck converter de...Figure 9.30 Illustration of the active soft‐switching Ćuk–buck converter der...Figure 9.31 Illustration of the active soft‐switching sepic–buck converter d...
10 Chapter 10Figure 10.1 (a) Buck converter topology and (b) its associated diode and out...Figure 10.2 (a) Boost converter topology, (b) active switch–voltage waveform...Figure 10.3 (a) Buck–boost converter topology, (b) passive switch–voltage wa...Figure 10.4 (a) Ćuk converter, (b) sepic converter, and (c) Zeta converter....Figure 10.5 (a) Voltage‐fed z‐source converter and (b) its equivalent buck c...Figure 10.6 (a) Current‐fed z‐source converter and (b) its equivalent buck c...Figure 10.7 (a) Quasi‐z‐source converter and (b) its equivalent buck convert...Figure 10.8 (a) High step‐down switched‐inductor converter with voltage tran...Figure 10.9 (a) High step‐down switched‐inductor converter with voltage tran...Figure 10.10 (a) Compound step‐down/step‐up switched capacitor converter wit...Figure 10.11 (a) Grafted buck–buck converter and (b) two buck converters in ...Figure 10.12 (a) Grafted boost–boost converter and (b) two boost converters ...
11 Chapter 11Figure 11.1 (a) The second‐order