Origin of Power Converters. Tsai-Fu Wu
converter topology with a buffer capacitor located be...Figure 11.4 Illustration of the deduction from Zeta converter to Ćuk one.Figure 11.5 Buck and boost converters in topological duality.Figure 11.6 Buck and boost converters in circuital forms, but not in circuit...Figure 11.7 (a) A transmission line model of two wires represented in a two‐...Figure 11.8 Synthesis of the new buck–boost converter with the graft scheme....Figure 11.9 Synthesis of the new boost–buck (Ćuk) converter with the graft s...Figure 11.10 Synthesis of the new buck–boost–buck (Zeta) converter with the ...Figure 11.11 Synthesis of the new boost–buck–boost (sepic) converter with th...Figure 11.12 Synthesis of the new buck‐family converters with the layer sche...Figure 11.13 The buck–boost–buck converter with an external inductor Lx, sho...Figure 11.14 Synthesis of the new boost‐family converters with the layer sch...Figure 11.15 The boost–buck–boost converter with an external capacitor Cx, s...Figure 11.16 Analogy of buck converter to DNA: (a) DNA in double‐helix struc...Figure 11.17 Replication of (a) DNA and (b) buck converter.Figure 11.18 Mutation of buck and boost converters to obtain buck–boost–buck...Figure 11.19 Mutation of buck–boost and boost–buck converters to obtain new ...
12 Chapter 12Figure 12.1 The six typical PWM DC/DC converters.Figure 12.2 General structure of the feedback network with source and load....Figure 12.3 The four basic feedback topologies: (a) series‐shunt, (b) shunt‐...Figure 12.4 Illustration of buck‐boost, Zeta, Ćuk, and sepic converters gene...Figure 12.5 Illustration of the buck‐boost and Zeta converters derived from ...Figure 12.6 Illustration of the Ćuk and sepic converters derived from the bo...Figure 12.7 General converter forms of (a) the buck family and (b) the boost...Figure 12.8 The two‐port network.Figure 12.9 The two types of interconnections of feedback two‐port networks:...Figure 12.10 Two‐port networks with feedback connection for (a) the buck fam...Figure 12.11 (a) h‐Parameter of the buck BCU and (b) g‐parameter of the boos...Figure 12.12 Basic converter units of resonant converters: (a) buck ZCS‐QRC,...
13 Chapter 13Figure 13.1 Conceptual block diagram of converters in cascade connection.Figure 13.2 Schematic diagrams of the buck and boost converters.Figure 13.3 Illustration of the buck‐boost SSC derived from the buck and boo...Figure 13.4 Illustration of the boost‐buck (Ćuk) SSC derived from the boost ...Figure 13.5 Small‐signal models of the SSCs represented in cascaded two‐port...Figure 13.6 (a) y‐Parameter of a PWM DC/DC converter structure and (b) t‐par...Figure 13.7 Illustration of the Zeta converter derived from the buck‐boost, ...Figure 13.8 Illustration of the sepic converter derived from the boost‐buck,...Figure 13.9 Small‐signal models of the SSCs represented in cascaded/cascoded...
14 Chapter 14Figure 14.1 Block diagram of a power converter with PFC.Figure 14.2 The buck ISSC family derived based on the graft scheme. (a) buck...Figure 14.3 The boost ISSC family derived based on the graft scheme. (a) boo...Figure 14.4 The buck‐boost ISSC family derived based on the graft scheme. (a...Figure 14.5 Small‐signal model of the SSC represented in cascaded two‐port n...Figure 14.6 (a) An SSC represented in t‐parameter and with a single‐voltage ...Figure 14.7 The predicted and measured bode plots of the loop gain of the bu...Figure 14.8 The input voltage vi and current ii waveforms of the discussed I...Figure 14.9 The control‐to‐output magnitude and phase plots of the rear semi...
15 Chapter 15Figure 15.1 Conceptual block diagrams of two different operating modes in PF...Figure 15.2 The ISSC derived from a buck‐boost semi‐stage and a flyback semi...Figure 15.3 The equivalent circuit of the buck‐boost semi‐stage acts as a PF...Figure 15.4 Conceptual current waveforms of (a) inductor Lpf and (b) active ...Figure 15.5 An equivalent circuit of the isolated flyback converter.Figure 15.6 The magnitude and phase plots of the control‐to‐output transfer ...Figure 15.7 Flyback semi‐stage with a peak current mode control.Figure 15.8 A small‐signal model of the proposed regulator semi‐stage system...Figure 15.9 Output voltage responses of the ISSC to a step duty ratio change...Figure 15.10 The ISSC with an RCD snubber.Figure 15.11 Oscillogram measured from the single‐stage converter (a) the li...Figure 15.12 (a) Measured efficiency versus input voltages, (b) measured pow...Figure 15.13 Control block diagram of the proposed ISSC with an H∞ con...Figure 15.14 Configuration of a standard H∞ control problem.Figure 15.15 Illustration of an augmented plant with a robust control.Figure 15.16 The magnitude–frequency plots of Fd(s) under several different ...Figure 15.17 The magnitude–frequency plots of Au(s) under several different ...Figure 15.18 The magnitude versus frequency plots of sensitivity function S ...Figure 15.19 The magnitude versus frequency plots of the complementary sensi...Figure 15.20 Step responses of the ISSC to the load changes from 0 to 50% an...Figure 15.21 Transient response of the ISSC with a robust controller: (a) th...
Guide
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