Antenna-in-Package Technology and Applications. Duixian Liu

Antenna-in-Package Technology and Applications - Duixian Liu


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for fabrication, and Duixian Liu did the evaluation and feedback.

      In August 2007, Sibeam put the first CMOS 60‐GHz phased array radio in an LTCC AiP [28]. It made board and system design much easier by containing all high‐frequency routing within the CMOS die and chip package, and enabled products in the market for wireless transmission of high‐definition video content. It is worthwhile mentioning that after Zhang's keynote address at the Antenna Systems and Short‐Range Wireless Conference 2005 held on 22–23 September in Santa Clara, California, USA, in the break Zhang enthusiastically discussed some issues about integration of antennas in LTCC with Doan, one of founders of SiBeam and pioneers in mmWave CMOS [29].

      The mass production of AiP began with LTCC technology. In 2005, the non‐standard process to embed an air cavity in LTCC was developed to improve antenna performance [31] and an open cavity radiating element was created to relax LTCC fabrication tolerance. In 2008, a grid array antenna and patterned mesh ground plane were devised to enhance reliability and avoid warpage for AiP in LTCC [32]. In 2012, a paper entitled “Dual grid array antennas in a thin‐profile package for flip‐chip interconnection to highly‐integrated 60‐GHz radios” won the IEEE AP‐S Sergei A. Schelkunoff Transactions Prize Paper Award [33]. In 2013, a step‐profiled corrugated horn antenna was realized in LTCC for AiP to operate at 300 GHz [34]. High‐density interconnect (HDI) technologies were developed specifically for the low‐cost production of AiP. In 2012, Samsung developed FR4‐based HDI technology for 60‐GHz radios. Despite the relatively high loss tangent of the FR4, Samsung confirmed that unit loss was comparable with the LTCC‐based AiP at 60 GHz [35]. In 2015, Intel developed liquid crystal polymer (LCP)‐based HDI technology for 60‐GHz radios. By limiting the number of metal layers to four, with the 60‐GHz routing on the same layer as the die pads, Intel demonstrated that AiP achieved an ultra‐thin profile at 60 GHz [36]. Unlike LTCC and HDI, the embedded wafer‐level ball grid array (eWLB) technology eliminates the need for a laminate substrate and replaces it with a copper redistribution layer. It was developed by Infineon in 2006 and proved to be an alternative approach to fabricating AiP in high volume with low cost [37]. However, eWLB technology only produces a single redistribution layer (RDL), which limits the realization of antennas. To overcome this limitation, the Taiwan Semiconductor Manufacturing Company (TSMC) developed the InFO‐AIP technology in 2018, which places the feeding line in the RDL at the bottom of the package, coupled to the patch antenna on the top side of the package. As a result, InFO‐AIP yields a smaller form factor and a higher gain for 5G mmWave system applications [38]. In addition, a major concern with AiP is the risk of electromagnetic interference (EMI). In 2014, Advanced Semiconductor Engineering, Inc. (ASE) developed package‐level conformal and compartment shielding techniques with metal coating to suppress EMI [39].

      A large number of


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